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Tuesday, November 30, 2010

Phase Locked Loop


A phase locked loop (PLL) is a control system that tries to generate an output signal whose phase is related to the phase of the input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector that compares the phase of the signal derived from the oscillator to an input signal. The signal from the phase detector is used to control the oscillator in a feedback loop. The circuit compares the phase of the input signal with the phase of a signal derived from its output oscillator and adjusts the frequency of its oscillator to keep the phases matched.

Frequency is the derivative of phase. Keeping the input and output phase in lock step implies keeping the input and output frequencies in lock step. Consequently, a phase-locked loop can track an input frequency, or it can generate a frequency that is a multiple of the input frequency. The former property is used for demodulation , and the latter property is used for indirect frequency synthesis .

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